Architecture

[ET]

I had some thoughts about the implementation of LispOS.

For the i486, I'm thinking the standard hack of using the
low one or two bits for immediate/pointer discrimination,
and putting the type code info at the head of the object,
etc. etc. etc.

When I was implementing MIT-Scheme for the 8086, I 
decided to use the SP register as the allocation frontier,
and the BP register to point to the current environment.
Henry Baker apparently came up with this at around the
same time with his  ``Cheney on the MTA'' paper that
introduces ``treadmill GC''.

I was thinking we could use this method for memory allocation
in LispOS.

What do others think?
			~jrm