Lisp and VLIW (was Re: Genera)

[eric dahlman]

On Fri, 3 Apr 1998 reti@wilson.ai.mit.edu wrote:
[snip]
> Most importantly, it carries the 8-bits of tag through the entire datapath and
> memory interface.  The microengine can do tag comparison and dispatch in parallel
> with an operation, so for example an add instruction can assume that the operands
> are both fixnums and start doing the addition at the same time that the tag
> comparison hardware is comparing the tags.  If there is a mismatch, that microcycle
> causes the result not to be stored and a trap to be taken.

Here is a question that I have been kicking around for a little while
about this type of thing.  How well would lisp compile to a VLIW
architecture with predicated execution?  The issues of tag comparisons and
the such being performed in parallel with the operations seem to be a
gimmy source of instruction level parallelism which would be easy to take
advantage of on such a processor.  Could it be that the next generation of
general purpose processors could be a real win for lisp?  Has anyone
looked into this issue?

Just wondering,

-Eric