TUNES

[FORTAINE Guillaume]

tunes-bounces at tunes.org wrote:
> On the development front, we've done nothing, but the rest of the
> world has made progress.  Computers are faster, multicore processors
> are becoming the norm, and high-level languages have become practical
> and popular.  One of these days the world will be ready for TUNES.
>   

1) Architecture :

*Field-programmable gate array* - Wikipedia, the free encyclopedia 
<http://en.wikipedia.org/wiki/Field-programmable_gate_array>


http://klabs.org/mapld05/papers/254_papachristou_paper.pdf

   *
     There are four different classes of reconfigurations:

1. Static Reconfiguration

Reconfigurable digital logic is currently implemented by FPGAs. Static 
reconfiguration is achieved by download- ing into the FPGA chip a new 
configuration functionality while the FPGA is off-line, i.e. not 
operating in normal mode. There is an obvious disadvantage with this 
off-line technique especially if the reconfiguration time is signif- 
icant. Many of the currently available FPGAs are still static 
reconfigurable.


2. Dynamic Reconfiguration

Dynamic reconfiguration means to insert a new FPGA functionality on the 
fly, i.e. while the chip is operating normally. One way to achieve this 
is by partial reconfiguration, i.e. inserting new configu- ration while 
the chip is operating, then swapping the old with the new configurations.


3. Self Reconfiguration

A second way for dynamic reconfiguration occurs if the chip modifies its 
own configu- ration using internal or peripheral signals for 
configuration purposes, during normal operation. This techniques leads 
to self reconfiguration provided the configuration signals are 
autonomously generated and not fed by commands. Currently, partially 
reconfigurable FPGAs are now com- mercially available, e.g. Xilinx 
Virtex II. However, au- tonomously reconfigurable and 
self-reconfigurable FPGAs are not available.



4. Evolvable Reconfiguration.

Evolvable reconfiguration [3] implies self-growth and repli- cation of 
the reconfigurable hardware. Evolvable hardware use bio-inspired 
approaches and may need other imple- mentation technologies not based on 
CMOS.




2) Programming Language :


RDL <http://www.dresd.org/?q=rdl> 	admin 
<http://www.dresd.org/?q=user/1> 	7 
<http://www.dresd.org/?q=og/users/338> 	Reconfiguration Design Language




C + VHDL =

CBits? <http://www.ulogic.org/trac/wiki/CBits> -- JBits 
<http://www.xilinx.com/products/jbits/>, only much, much, faster, in C, 
with bindings, with support for virtex4 and virtex5.



Hardware/Software Co-Design Contest - end 
<http://www.dresd.org/?q=node/664>(16 days)

Best Regards,

Guillaume FORTAINE