Genera

[Rainer Joswig]

At 15:31 Uhr +0000 03.04.1998, Chris Bitmead wrote:

>I heard the Sparc architecture has some support for tagged
>designs. Is it comparable in that respect or not?

Tag support on the SPARC is very limited. There was an
article about the Lucid (I think) CL port to SPARC and
how it used the SPARC processor (two (?) tag bits on the low bits).
Did know about fixnums, references, and other data.
An add instruction can work on fixnums, if other
data is provided it would select another adding routine.
But I guess this was mostly all.
The SPARC design is influenced by a Smalltalk chip.

>> The chip also has hardware support for ephemeral garbage collection, an interface
>> to a co-processor, a way to do efficient burst mode transfers on the memory bus,
>> and a special limited mode (FEP mode) for running some much more stylized Lisp
>> code the load the virtual image, etc.

MCL uses the memory management facility for its ephemeral GC
on the 68k. There was an init to set an appropriate page size.

There was also an article about GC support in the special ARM
chip used in the Newton. But somebody from Apple told
me that they didn't use it for the Newton OS.

Rainer Joswig, Lavielle EDV Systemberatung GmbH & Co, Lotharstrasse 2b, D22041
Hamburg, Tel: +49 40 658088, Fax: +49 40 65808-202,
Email: joswig@lavielle.com , WWW: http://www.lavielle.com/~joswig/