PowerPC CPU architecture Q

[Glenn Alexander]

On Tue, 18 May 2004 08:14, Lee Salzman wrote: 
 
(snip info not relevant to my reply, but very relevant to my query) 
 
> Aside from that, any architecture that is compiler-friendly 
> in general is very good. The PPC is rather compiler-friendly. 
> Moreso than the x86, but not terribly much more. Lots of 
> registers - good. Fairly uniform instruction set - good. 
> Reasonable but not oversimplified addressing modes - also 
> really good. Some oddities in the instruction encoding. 
> Overall, though, still quite good. 
> 
> Lee 
 
Thanx, that is exactly what I wanted to know. I think I read back some 
time Slate is first targeting x86 because it has the biggest installed 
base amongst potential developers/users, then PowerPC because that is 
what the key developers (yourself and Brian) prefer to use (and has 
the next largest potential developer/user base). Other arches like ARM 
and MIPS will be some time off. 
 
Assuming this is correct, I may see what I can do about using either a 
yichy x86 or a PowerPC for my initial Brick prototype, rather than an 
ARM or MIPS device. I initially was shy of the more desktop-oriented 
architectures as they are all WAY to complex wiring-wise for me to 
have much chance of success (although  some of the latest have >=1MB 
L2/SRAM which could simplify things), but most of the modern embedded 
chips are now just as difficult to work with. :-(. 
 
I may have another hunt through what is avaliable in pre-built 
embedded boards. I'd rather go from scratch, but have to keep within 
my personal limitations. If I can find a really no-frills board, an 
I/O expansion card is much more within the field of what I was trained 
to do. 
 
Reards, 
Glenn 
 
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Glenn Alexander 
(B.Teach, B.Ed Major IT Education, University of Wollongong Australia) 
http://www.shoalhaven.net.au/~glenalec 
 
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from Debian: http://www.debian.org 
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