Reconfigurable hardware & TUNES
Sun, 7 Mar 1999 11:16:38 -0800
I'm kinda busy with college right now, so my prototype OS is
progressing very slowly. I'm still working on the floppy driver, then
I'll polish off the kernel module system, and get to work on the good
The past few weeks I've spent a lot of time studying reconfigurable
computing. I'm convinced that dynamically programmable gate arrays,
DPGA's, will be a major part of future computers, with sequential
processors relegated to a "shepherding" role. We should keep that in
mind as we design Tunes. I'm thinking we should have a "HLL to logic
circuit" translator, which uses combinational logic (i.e., bit-grained
parallelism) as much as possible, and sequential (serial) logic only
for inherential sequential operations or when there's not enough
hardware available to do everything at once.
Imagine the implications.. instead of thinking in terms of 8, 16, 32,
64 bits, we'll be able to work with however many bits we want, from 1
to 1000 and up. Data flows directly from one circuit to another,
without load/store operations. Peripherals can be connected directly to
the DPGA chips... disk controllers, video cards, etc, can be
implemented in the DPGA's.
The hardest part of reconfigurable hardware is the software to run it.
I think that's where Tunes comes in. I'm working with some simple PGA's
in college, then getting some of my own so I have a reconfigurable
computer to play with. Should be interesting :)
The MIT AI lab has some good stuff.. http://www.ai.mit.edu/projects
I know some of you have already seen it, but I've gotta reiterate it :)
Check out "Reinventing computing" and "Transit" (which deal with a lot
of DPGA's), "The Scheme Underground" (You'll like that one, Fare),
and the "amorphous computing" subproject of Project MAC.